Difference between revisions of "Secure Services"

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m (removed asm version of ROM_CRC_check due to C version)
m (Security services in BootROM)
Line 110: Line 110:
 
== Security services in BootROM ==
 
== Security services in BootROM ==
  
Using in ROM_CRC_check function (see [[Application_Processor_Boot_ROM]])
+
Using in ROM_CRC_check function (see [[Application_Processor_Boot_ROM#ROM_CRC_check]])
  
 
== Security services from PPA from mbmloader ==
 
== Security services from PPA from mbmloader ==

Revision as of 07:57, 14 January 2012

Summary

Secure Service ID (SSID) Secure Service Name Hardware/Software Secure Service Description
0x01 unknown Hardware Authenticate and import keys
0x02 unknown Hardware Check if R&D certificate present and authenticate it
0x03 unknown Hardware Load and authenticate PPA
0x04 unknown Hardware Check RSA digest
0xf API_HAL_PA_LOAD Hardware Load Protected Application at Secure RAM
0x11 API_HAL_PA_UNLOAD_ALL Hardware Unload all loaded Protected Applications (except of PPA?) from Secure RAM
0x13 API_HAL_SDP_RUNTIME_INIT Hardware unknown
0x15 API_HAL_SEC_RPC_INIT Hardware unknown
0x19 API_HAL_CONTEXT_SAVE_RESTORE Hardware unknown
0x1a API_HAL_SEC_RAM_RESIZE Hardware Resize Secure RAM
0x1e unknown Hardware unknown (from bootrom)
0x1f unknown Hardware unknown (from bootrom)
0x22 API_HAL_KM_CRC_READ Hardware unknown
0x27 API_HAL_NB_MAX_SVC Hardware unknown
0x28 unknown Software dcache invalidate (defined in PPA from mbmloader)
0x29 unknown Software L2 aux write (defined in PPA from mbmloader)
0x2a unknown Software aux write (defined in PPA from mbmloader)
0x2b unknown Software nonsecure access write (defined in PPA from mbmloader)
0x31 API_HAL_MOT_EFUSE Software Blow eFuse entry (defined in PPA from mbmloader)
0x36 API_HAL_MOT_EFUSE_READ Software Read eFuse entry (defined in PPA from mbmloader)

Security services in BootROM

Using in ROM_CRC_check function (see Application_Processor_Boot_ROM#ROM_CRC_check)

Security services from PPA from mbmloader

Invalid language.

You need to specify a language like this: <source lang="html4strict">...</source>

Supported languages for syntax highlighting:

4cs, 6502acme, 6502kickass, 6502tasm, 68000devpac, abap, actionscript, actionscript3, ada, algol68, apache, applescript, apt_sources, arm, asm, asp, asymptote, autoconf, autohotkey, autoit, avisynth, awk, bascomavr, bash, basic4gl, bf, bibtex, blitzbasic, bnf, boo, c, c_loadrunner, c_mac, caddcl, cadlisp, cfdg, cfm, chaiscript, cil, clojure, cmake, cobol, coffeescript, cpp, cpp-qt, csharp, css, cuesheet, d, dcl, dcpu16, dcs, delphi, diff, div, dos, dot, e, ecmascript, eiffel, email, epc, erlang, euphoria, f1, falcon, fo, fortran, freebasic, freeswitch, fsharp, gambas, gdb, genero, genie, gettext, glsl, gml, gnuplot, go, groovy, gwbasic, haskell, haxe, hicest, hq9plus, html4strict, html5, icon, idl, ini, inno, intercal, io, j, java, java5, javascript, jquery, kixtart, klonec, klonecpp, latex, lb, ldif, lisp, llvm, locobasic, logtalk, lolcode, lotusformulas, lotusscript, lscript, lsl2, lua, m68k, magiksf, make, mapbasic, matlab, mirc, mmix, modula2, modula3, mpasm, mxml, mysql, nagios, netrexx, newlisp, nsis, oberon2, objc, objeck, ocaml, ocaml-brief, octave, oobas, oorexx, oracle11, oracle8, oxygene, oz, parasail, parigp, pascal, pcre, per, perl, perl6, pf, php, php-brief, pic16, pike, pixelbender, pli, plsql, postgresql, povray, powerbuilder, powershell, proftpd, progress, prolog, properties, providex, purebasic, pycon, pys60, python, q, qbasic, rails, rebol, reg, rexx, robots, rpmspec, rsplus, ruby, sas, scala, scheme, scilab, sdlbasic, smalltalk, smarty, spark, sparql, sql, stonescript, systemverilog, tcl, teraterm, text, thinbasic, tsql, typoscript, unicon, upc, urbi, uscript, vala, vb, vbnet, vedit, verilog, vhdl, vim, visualfoxpro, visualprolog, whitespace, whois, winbatch, xbasic, xml, xorg_conf, xpp, yaml, z80, zxbasic


ROM:86FFF538     ; =============== S U B R O U T I N E =======================================
ROM:86FFF538
ROM:86FFF538
ROM:86FFF538     ; int __cdecl PPA_SMC_handler(__int32 arg)
ROM:86FFF538     PPA_SMC_handler                                             ; CODE XREF: PPA_control_smc_handler_+2�p
ROM:86FFF538 000                 LDR             R3, =0xAF900088             ; Load from Memory
ROM:86FFF53A 000                 MOV.W           R2, #0x8000                 ; Rd = Op2
ROM:86FFF53E 000                 MOV             R1, R0                      ; Rd = Op2
ROM:86FFF540 000                 MOVS            R0, #0                      ; Rd = Op2
ROM:86FFF542 000                 STR             R2, [R3]                    ; Store to Memory
ROM:86FFF544 000                 CMP             R1, #0x28                   ; Set cond. codes on Op1 - Op2
ROM:86FFF546 000                 BNE             not_dcache_invalidate       ; Branch
ROM:86FFF546
ROM:86FFF548 000                 LDR             R0, =(PPA_control_dcache_invalidate - not_dcache_invalidate) ; Load from Memory
ROM:86FFF54A 000                 ADD             R0, PC                      ; Rd = Op1 + Op2
ROM:86FFF54C 000                 BX              LR                          ; Branch to/from Thumb mode
ROM:86FFF54C
ROM:86FFF54E     ; ---------------------------------------------------------------------------
ROM:86FFF54E
ROM:86FFF54E     not_dcache_invalidate                                       ; CODE XREF: PPA_SMC_handler+E�j
ROM:86FFF54E                                                                 ; DATA XREF: ROM:off_86FFF5A4�o
ROM:86FFF54E 000                 CMP             R1, #0x29                   ; Set cond. codes on Op1 - Op2
ROM:86FFF550 000                 BNE             not_control_L2_aux_write    ; Branch
ROM:86FFF550
ROM:86FFF552 000                 LDR             R0, =(PPA_control_L2_aux_write - not_control_L2_aux_write) ; Load from Memory
ROM:86FFF554 000                 ADD             R0, PC                      ; Rd = Op1 + Op2
ROM:86FFF556 000                 BX              LR                          ; Branch to/from Thumb mode
ROM:86FFF556
ROM:86FFF558     ; ---------------------------------------------------------------------------
ROM:86FFF558
ROM:86FFF558     not_control_L2_aux_write                                    ; CODE XREF: PPA_SMC_handler+18�j
ROM:86FFF558                                                                 ; DATA XREF: ROM:off_86FFF5A8�o
ROM:86FFF558 000                 CMP             R1, #0x2A                   ; Set cond. codes on Op1 - Op2
ROM:86FFF55A 000                 BNE             not_control_aux_write       ; Branch
ROM:86FFF55A
ROM:86FFF55C 000                 LDR             R0, =(PPA_control_aux_write - not_control_aux_write) ; Load from Memory
ROM:86FFF55E 000                 ADD             R0, PC                      ; Rd = Op1 + Op2
ROM:86FFF560 000                 BX              LR                          ; Branch to/from Thumb mode
ROM:86FFF560
ROM:86FFF562     ; ---------------------------------------------------------------------------
ROM:86FFF562
ROM:86FFF562     not_control_aux_write                                       ; CODE XREF: PPA_SMC_handler+22�j
ROM:86FFF562                                                                 ; DATA XREF: ROM:off_86FFF5AC�o
ROM:86FFF562 000                 CMP             R1, #0x2B                   ; Set cond. codes on Op1 - Op2
ROM:86FFF564 000                 BNE             not_control_nonsecure_access_write ; Branch
ROM:86FFF564
ROM:86FFF566 000                 LDR             R0, =(PPA_control_nonsecure_access_write - not_control_nonsecure_access_write) ; Load from Memory
ROM:86FFF568 000                 ADD             R0, PC                      ; Rd = Op1 + Op2
ROM:86FFF56A 000                 BX              LR                          ; Branch to/from Thumb mode
ROM:86FFF56A
ROM:86FFF56C     ; ---------------------------------------------------------------------------
ROM:86FFF56C
ROM:86FFF56C     not_control_nonsecure_access_write                          ; CODE XREF: PPA_SMC_handler+2C�j
ROM:86FFF56C                                                                 ; DATA XREF: ROM:off_86FFF5B0�o
ROM:86FFF56C 000                 CMP             R1, #API_HAL_MOT_EFUSE      ; Set cond. codes on Op1 - Op2
ROM:86FFF56E 000                 BNE             not_API_HAL_MOT_EFUSE       ; Branch
ROM:86FFF56E
ROM:86FFF570 000                 LDR             R0, =(PPA_API_HAL_MOT_EFUSE+1 - not_API_HAL_MOT_EFUSE) ; Load from Memory
ROM:86FFF572 000                 ADD             R0, PC                      ; Rd = Op1 + Op2
ROM:86FFF574 000                 BX              LR                          ; Branch to/from Thumb mode
ROM:86FFF574
ROM:86FFF576     ; ---------------------------------------------------------------------------
ROM:86FFF576
ROM:86FFF576     not_API_HAL_MOT_EFUSE                                       ; CODE XREF: PPA_SMC_handler+36�j
ROM:86FFF576                                                                 ; DATA XREF: ROM:off_86FFF5B4�o
ROM:86FFF576 000                 CMP             R1, #API_HAL_MOT_EFUSE_READ ; Set cond. codes on Op1 - Op2
ROM:86FFF578 000                 BNE             not_API_HAL_MOT_EFUSE_READ  ; Branch
ROM:86FFF578
ROM:86FFF57A 000                 LDR             R0, =(PPA_API_HAL_MOT_EFUSE_READ+1 - not_API_HAL_MOT_EFUSE_READ) ; Load from Memory
ROM:86FFF57C 000                 ADD             R0, PC                      ; Rd = Op1 + Op2
ROM:86FFF57E 000                 BX              LR                          ; Branch to/from Thumb mode
ROM:86FFF57E
ROM:86FFF580     ; ---------------------------------------------------------------------------
ROM:86FFF580
ROM:86FFF580     not_API_HAL_MOT_EFUSE_READ                                  ; CODE XREF: PPA_SMC_handler+40�j
ROM:86FFF580                                                                 ; DATA XREF: ROM:off_86FFF5B8�o
ROM:86FFF580 000                 CMP             R1, #0x2C                   ; Set cond. codes on Op1 - Op2
ROM:86FFF582 000                 BNE             not_control_data_memory_sync ; Branch
ROM:86FFF582
ROM:86FFF584 000                 LDR             R0, =(PPA_control_data_memory_sync - not_control_data_memory_sync) ; Load from Memory
ROM:86FFF586 000                 ADD             R0, PC                      ; Rd = Op1 + Op2
ROM:86FFF588 000                 BX              LR                          ; Branch to/from Thumb mode
ROM:86FFF588
ROM:86FFF58A     ; ---------------------------------------------------------------------------
ROM:86FFF58A
ROM:86FFF58A     not_control_data_memory_sync                                ; CODE XREF: PPA_SMC_handler+4A�j
ROM:86FFF58A                                                                 ; DATA XREF: ROM:off_86FFF5BC�o
ROM:86FFF58A 000                 CMP             R1, #0x32                   ; Set cond. codes on Op1 - Op2
ROM:86FFF58C 000                 BNE             function_is_48              ; Branch
ROM:86FFF58C
ROM:86FFF58E 000                 LDR             R0, =(PPA_wait_for_something+1 - function_is_48) ; Load from Memory
ROM:86FFF590 000                 ADD             R0, PC                      ; Rd = Op1 + Op2
ROM:86FFF590
ROM:86FFF592
ROM:86FFF592     return                                                      ; CODE XREF: PPA_SMC_handler+5E�j
ROM:86FFF592 000                 BX              LR                          ; Branch to/from Thumb mode
ROM:86FFF592
ROM:86FFF594     ; ---------------------------------------------------------------------------
ROM:86FFF594
ROM:86FFF594     function_is_48                                              ; CODE XREF: PPA_SMC_handler+54�j
ROM:86FFF594                                                                 ; DATA XREF: ROM:off_86FFF5C0�o
ROM:86FFF594 000                 CMP             R1, #0x48                   ; Set cond. codes on Op1 - Op2
ROM:86FFF596 000                 BNE             return                      ; Branch
ROM:86FFF596
ROM:86FFF598 000                 LDR             R0, =(PPA_sub_86FFFD06+1 - 0x86FFF59E) ; Load from Memory
ROM:86FFF59A 000                 ADD             R0, PC                      ; Rd = Op1 + Op2
ROM:86FFF59C 000                 BX              LR                          ; Branch to/from Thumb mode
ROM:86FFF59C
ROM:86FFF59C     ; End of function PPA_SMC_handler
ROM:86FFF59C
ROM:86FFF59C     ; ---------------------------------------------------------------------------
ROM:86FFF59E                     ALIGN 0x10
ROM:86FFF5A0     dword_86FFF5A0  DCD 0xAF900088                              ; DATA XREF: PPA_SMC_handler�r
ROM:86FFF5A4     off_86FFF5A4    DCD PPA_control_dcache_invalidate - not_dcache_invalidate
ROM:86FFF5A4                                                                 ; DATA XREF: PPA_SMC_handler+10�r
ROM:86FFF5A8     off_86FFF5A8    DCD PPA_control_L2_aux_write - not_control_L2_aux_write
ROM:86FFF5A8                                                                 ; DATA XREF: PPA_SMC_handler+1A�r
ROM:86FFF5AC     off_86FFF5AC    DCD PPA_control_aux_write - not_control_aux_write
ROM:86FFF5AC                                                                 ; DATA XREF: PPA_SMC_handler+24�r
ROM:86FFF5B0     off_86FFF5B0    DCD PPA_control_nonsecure_access_write - not_control_nonsecure_access_write
ROM:86FFF5B0                                                                 ; DATA XREF: PPA_SMC_handler+2E�r
ROM:86FFF5B4     off_86FFF5B4    DCD PPA_API_HAL_MOT_EFUSE+1 - not_API_HAL_MOT_EFUSE
ROM:86FFF5B4                                                                 ; DATA XREF: PPA_SMC_handler+38�r
ROM:86FFF5B8     off_86FFF5B8    DCD PPA_API_HAL_MOT_EFUSE_READ+1 - not_API_HAL_MOT_EFUSE_READ
ROM:86FFF5B8                                                                 ; DATA XREF: PPA_SMC_handler+42�r
ROM:86FFF5BC     off_86FFF5BC    DCD PPA_control_data_memory_sync - not_control_data_memory_sync
ROM:86FFF5BC                                                                 ; DATA XREF: PPA_SMC_handler+4C�r
ROM:86FFF5C0     off_86FFF5C0    DCD PPA_wait_for_something+1 - function_is_48
ROM:86FFF5C0                                                                 ; DATA XREF: PPA_SMC_handler+56�r
ROM:86FFF5C4     off_86FFF5C4    DCD PPA_sub_86FFFD06+1 - 0x86FFF59E         ; DATA XREF: PPA_SMC_handler+60�r

security_check_ISW

Invalid language.

You need to specify a language like this: <source lang="html4strict">...</source>

Supported languages for syntax highlighting:

4cs, 6502acme, 6502kickass, 6502tasm, 68000devpac, abap, actionscript, actionscript3, ada, algol68, apache, applescript, apt_sources, arm, asm, asp, asymptote, autoconf, autohotkey, autoit, avisynth, awk, bascomavr, bash, basic4gl, bf, bibtex, blitzbasic, bnf, boo, c, c_loadrunner, c_mac, caddcl, cadlisp, cfdg, cfm, chaiscript, cil, clojure, cmake, cobol, coffeescript, cpp, cpp-qt, csharp, css, cuesheet, d, dcl, dcpu16, dcs, delphi, diff, div, dos, dot, e, ecmascript, eiffel, email, epc, erlang, euphoria, f1, falcon, fo, fortran, freebasic, freeswitch, fsharp, gambas, gdb, genero, genie, gettext, glsl, gml, gnuplot, go, groovy, gwbasic, haskell, haxe, hicest, hq9plus, html4strict, html5, icon, idl, ini, inno, intercal, io, j, java, java5, javascript, jquery, kixtart, klonec, klonecpp, latex, lb, ldif, lisp, llvm, locobasic, logtalk, lolcode, lotusformulas, lotusscript, lscript, lsl2, lua, m68k, magiksf, make, mapbasic, matlab, mirc, mmix, modula2, modula3, mpasm, mxml, mysql, nagios, netrexx, newlisp, nsis, oberon2, objc, objeck, ocaml, ocaml-brief, octave, oobas, oorexx, oracle11, oracle8, oxygene, oz, parasail, parigp, pascal, pcre, per, perl, perl6, pf, php, php-brief, pic16, pike, pixelbender, pli, plsql, postgresql, povray, powerbuilder, powershell, proftpd, progress, prolog, properties, providex, purebasic, pycon, pys60, python, q, qbasic, rails, rebol, reg, rexx, robots, rpmspec, rsplus, ruby, sas, scala, scheme, scilab, sdlbasic, smalltalk, smarty, spark, sparql, sql, stonescript, systemverilog, tcl, teraterm, text, thinbasic, tsql, typoscript, unicon, upc, urbi, uscript, vala, vb, vbnet, vedit, verilog, vhdl, vim, visualfoxpro, visualprolog, whitespace, whois, winbatch, xbasic, xml, xorg_conf, xpp, yaml, z80, zxbasic


ROM:400161E8     ; int __cdecl security_check_CertISW(void *arg1, int arg2, void *arg3, int arg4)
ROM:400161E8     security_check_CertISW                                      ; CODE XREF: boot_HS_image_exec+C4
ROM:400161E8                                                                 ; boot_memory_image_auth_exec+C4
ROM:400161E8
ROM:400161E8     arg_0           =  0
ROM:400161E8
ROM:400161E8 000                 PUSH.W          {R4-R10,LR}                 ; count
ROM:400161EC 020                 MOV             R10, R1                     ; Rd = Op2
ROM:400161EE 020                 LDR             R5, =unk_4020FFB4           ; Load from Memory
ROM:400161F0 020                 MOV             R9, R0                      ; Rd = Op2
ROM:400161F2 020                 LDR             R7, [SP,#0x20+arg_0]        ; Load from Memory
ROM:400161F4 020                 MOVS            R0, #0                      ; Rd = Op2
ROM:400161F6 020                 MOV             R8, R2                      ; Rd = Op2
ROM:400161F8 020                 MOV             R6, R3                      ; Rd = Op2
ROM:400161FA 020                 LDR             R1, [R5]                    ; Load from Memory
ROM:400161FC 020                 ORR.W           R1, R1, #tracing2_Reserved2 ; Rd = Op1 | Op2
ROM:40016200 020                 STR             R1, [R5]                    ; Store to Memory
ROM:40016202 020                 MOVS            R4, #1                      ; Rd = Op2
ROM:40016204 020                 LDR             R2, =0x809795A3             ; Load from Memory
ROM:40016206 020                 LDR             R1, [R3]                    ; Load from Memory
ROM:40016208 020                 CMP             R1, R2                      ; Set cond. codes on Op1 - Op2
ROM:4001620A 020                 BEQ             search_CertISW_mark         ; Branch
ROM:4001620A
ROM:4001620C 020                 MOVS            R4, #0                      ; Rd = Op2
ROM:4001620C
ROM:4001620E
ROM:4001620E     search_CertISW_mark                                         ; CODE XREF: security_check_CertISW+22
ROM:4001620E 020                 CBNZ            R4, found                   ; Compare and Branch on Non-Zero
ROM:4001620E
ROM:40016210 020                 MOVS            R2, #CH_STRINGS.CHMMCSD     ; source
ROM:40016212 020                 MOV             R1, R6                      ; void *
ROM:40016214 020                 ADR             R0, CertISW_mark            ; "CertISW"
ROM:40016216 020                 BL              standard_memcmp             ; Branch with Link
ROM:40016216
ROM:4001621A 020                 CBNZ            R0, not_found               ; Compare and Branch on Non-Zero
ROM:4001621A
ROM:4001621C 020                 MOVS            R0, #1                      ; Rd = Op2
ROM:4001621E 020                 B               found                       ; Branch
ROM:4001621E
ROM:40016220     ; ---------------------------------------------------------------------------
ROM:40016220
ROM:40016220     not_found                                                   ; CODE XREF: security_check_CertISW+32
ROM:40016220 020                 MOVS            R0, #0                      ; Rd = Op2
ROM:40016220
ROM:40016222
ROM:40016222     found                                                       ; CODE XREF: security_check_CertISW:search_CertISW_mark
ROM:40016222                                                                 ; security_check_CertISW+36
ROM:40016222 020                 ORRS            R0, R4                      ; Rd = Op1 | Op2
ROM:40016224 020                 BEQ             return_1                    ; Branch
ROM:40016224
ROM:40016226 020                 LDRH            R0, [R7]                    ; Load from Memory
ROM:40016228 020                 LSLS            R0, R0, #28                 ; Logical Shift Left
ROM:4001622A 020                 BMI             Load_keys_and_search_for_RnD_certificate ; Branch
ROM:4001622A
ROM:4001622C 020                 LDR             R0, [R5]                    ; Load from Memory
ROM:4001622E 020                 CBZ             R4, loc_4001623C            ; Compare and Branch on Zero
ROM:4001622E
ROM:40016230 020                 ORR.W           R0, R0, #0b1000000000       ; Rd = Op1 | Op2
ROM:40016234 020                 STR             R0, [R5]                    ; Store to Memory
ROM:40016236 020                 ADD.W           R0, R6, #0x38               ; Rd = Op1 + Op2
ROM:4001623A 020                 B               enable_speedup              ; Branch
ROM:4001623A
ROM:4001623C     ; ---------------------------------------------------------------------------
ROM:4001623C
ROM:4001623C     loc_4001623C                                                ; CODE XREF: security_check_CertISW+46
ROM:4001623C 020                 ORR.W           R0, R0, #0b10000000000      ; Rd = Op1 | Op2
ROM:40016240 020                 STR             R0, [R5]                    ; Store to Memory
ROM:40016242 020                 ADD.W           R0, R6, #0xA4               ; arg
ROM:40016242
ROM:40016246
ROM:40016246     enable_speedup                                              ; CODE XREF: security_check_CertISW+52
ROM:40016246 020                 BL              load_speedup_table          ; Branch with Link
ROM:40016246
ROM:4001624A
ROM:4001624A     Load_keys_and_search_for_RnD_certificate                    ; CODE XREF: security_check_CertISW+42
ROM:4001624A 020                 MOV             R0, R9                      ; Rd = Op2
ROM:4001624C 020                 BL              security_call_SSID_0x01     ; SECURITY SERVICE: Load Keys (CertPK) to Secure RAM
ROM:4001624C
ROM:40016250 020                 CMP.W           R8, #0                      ; Set cond. codes on Op1 - Op2
ROM:40016254 020                 BEQ             Keys_loaded_without_RnD     ; Branch
ROM:40016254
ROM:40016256 020                 LDR             R0, =memory_buffer          ; Load from Memory
ROM:40016258 020                 LDR             R1, [R0]                    ; Load from Memory
ROM:4001625A 020                 ORR.W           R1, R1, #tracing_R&D_certificate_found ; Rd = Op1 | Op2
ROM:4001625E 020                 STR             R1, [R0]                    ; Store to Memory
ROM:40016260 020                 MOV             R0, R8                      ; arg_1
ROM:40016262 020                 BL              security_call_SSID_0x02     ; verify R&D certificate
ROM:40016262
ROM:40016266
ROM:40016266     Keys_loaded_without_RnD                                     ; CODE XREF: security_check_CertISW+6C
ROM:40016266 020                 LDR             R0, [R5]                    ; Load from Memory
ROM:40016268 020                 ORR.W           R0, R0, #0x800              ; Rd = Op1 | Op2
ROM:4001626C 020                 STR             R0, [R5]                    ; Store to Memory
ROM:4001626E 020                 MOV             R0, R10                     ; arg_1
ROM:40016270 020                 BL              security_call_SSID_0x03     ; load and authenticate PPA
ROM:40016270
ROM:40016274 020                 CBNZ            R0, return_error            ; Compare and Branch on Non-Zero
ROM:40016274
ROM:40016276 020                 LDRH            R0, [R7]                    ; Load from Memory
ROM:40016278 020                 ORR.W           R0, R0, #0x800              ; Rd = Op1 | Op2
ROM:4001627C 020                 STRH            R0, [R7]                    ; Store to Memory
ROM:4001627E 020                 MOVS            R0, #0                      ; Rd = Op2
ROM:4001627E
ROM:40016280
ROM:40016280     return                                                      ; CODE XREF: security_check_CertISW+B4
ROM:40016280 020                 POP.W           {R4-R10,PC}                 ; Pop registers
ROM:40016280
ROM:40016284     ; ---------------------------------------------------------------------------
ROM:40016284
ROM:40016284     return_error                                                ; CODE XREF: security_check_CertISW+8C
ROM:40016284 020                 LDR             R0, [R5]                    ; Load from Memory
ROM:40016286 020                 ORR.W           R0, R0, #0b1000000000000    ; set bit #12
ROM:4001628A 020                 STR             R0, [R5]                    ; Store to Memory
ROM:4001628C 020                 LDR             R0, =sub_140A8              ; Load from Memory
ROM:4001628E 020                 BLX             call_dead_loops             ; Branch with Link and Exchange (immediate address)
ROM:4001628E
ROM:40016292
ROM:40016292     return_1                                                    ; CODE XREF: security_check_CertISW+3C
ROM:40016292 020                 LDR             R0, [R5]                    ; Load from Memory
ROM:40016294 020                 ORR.W           R0, R0, #0b10000000000000   ; set bit #13
ROM:40016298 020                 STR             R0, [R5]                    ; Store to Memory
ROM:4001629A 020                 MOVS            R0, #1                      ; Rd = Op2
ROM:4001629C 020                 B               return                      ; Branch
ROM:4001629C
ROM:4001629C     ; End of function security_check_CertISW
ROM:4001629C
ROM:4001629C     ; ---------------------------------------------------------------------------
ROM:4001629E                     DCW 0
ROM:400162A0     off_400162A0    DCD unk_4020FFB4                            ; DATA XREF: security_check_CertISW+6
ROM:400162A4     dword_400162A4  DCD 0x809795A3                              ; DATA XREF: security_check_CertISW+1C
ROM:400162A8     CertISW_mark    DCB "CertISW",0                             ; DATA XREF: security_check_CertISW+2C
ROM:400162B0     off_400162B0    DCD memory_buffer                           ; DATA XREF: security_check_CertISW+6E
ROM:400162B4     image_cant_exec DCD sub_140A8                               ; DATA XREF: security_check_CertISW+A4

security_ISW_authentication

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4cs, 6502acme, 6502kickass, 6502tasm, 68000devpac, abap, actionscript, actionscript3, ada, algol68, apache, applescript, apt_sources, arm, asm, asp, asymptote, autoconf, autohotkey, autoit, avisynth, awk, bascomavr, bash, basic4gl, bf, bibtex, blitzbasic, bnf, boo, c, c_loadrunner, c_mac, caddcl, cadlisp, cfdg, cfm, chaiscript, cil, clojure, cmake, cobol, coffeescript, cpp, cpp-qt, csharp, css, cuesheet, d, dcl, dcpu16, dcs, delphi, diff, div, dos, dot, e, ecmascript, eiffel, email, epc, erlang, euphoria, f1, falcon, fo, fortran, freebasic, freeswitch, fsharp, gambas, gdb, genero, genie, gettext, glsl, gml, gnuplot, go, groovy, gwbasic, haskell, haxe, hicest, hq9plus, html4strict, html5, icon, idl, ini, inno, intercal, io, j, java, java5, javascript, jquery, kixtart, klonec, klonecpp, latex, lb, ldif, lisp, llvm, locobasic, logtalk, lolcode, lotusformulas, lotusscript, lscript, lsl2, lua, m68k, magiksf, make, mapbasic, matlab, mirc, mmix, modula2, modula3, mpasm, mxml, mysql, nagios, netrexx, newlisp, nsis, oberon2, objc, objeck, ocaml, ocaml-brief, octave, oobas, oorexx, oracle11, oracle8, oxygene, oz, parasail, parigp, pascal, pcre, per, perl, perl6, pf, php, php-brief, pic16, pike, pixelbender, pli, plsql, postgresql, povray, powerbuilder, powershell, proftpd, progress, prolog, properties, providex, purebasic, pycon, pys60, python, q, qbasic, rails, rebol, reg, rexx, robots, rpmspec, rsplus, ruby, sas, scala, scheme, scilab, sdlbasic, smalltalk, smarty, spark, sparql, sql, stonescript, systemverilog, tcl, teraterm, text, thinbasic, tsql, typoscript, unicon, upc, urbi, uscript, vala, vb, vbnet, vedit, verilog, vhdl, vim, visualfoxpro, visualprolog, whitespace, whois, winbatch, xbasic, xml, xorg_conf, xpp, yaml, z80, zxbasic


ROM:400162B8
ROM:400162B8     ; int __cdecl security_ISW_authentication(void *mem_1, void *mem_2)
ROM:400162B8     security_ISW_authentication                                 ; CODE XREF: boot_HS_image_exec+CE�p
ROM:400162B8                                                                 ; boot_memory_image_auth_exec+106�p
ROM:400162B8 000                 LDR             R2, =memory_buffer          ; Load from Memory
ROM:400162BA 000                 PUSH            {R4,LR}                     ; Push registers
ROM:400162BC 008                 LDR             R3, [R2]                    ; Load from Memory
ROM:400162BE 008                 ORR.W           R3, R3, #tracing_Initial_SW_authentication_started ; Rd = Op1 | Op2
ROM:400162C2 008                 STR             R3, [R2]                    ; Store to Memory
ROM:400162C4 008                 BL              security_call_SSID_0x04     ; Initial Software Image auth
ROM:400162C4
ROM:400162C8 008                 LDR             R0, =unk_4020FFB4           ; Load from Memory
ROM:400162CA 008                 LDR             R1, [R0]                    ; Load from Memory
ROM:400162CC 008                 ORR.W           R1, R1, #tracing2_No_known_NAND_was_detected ; Rd = Op1 | Op2
ROM:400162D0 008                 STR             R1, [R0]                    ; Store to Memory
ROM:400162D2 008                 POP             {R4,PC}                     ; Pop registers
ROM:400162D2
ROM:400162D2     ; End of function security_ISW_authentication
ROM:400162D2
ROM:400162D2     ; ---------------------------------------------------------------------------
ROM:400162D4     off_400162D4    DCD memory_buffer                           ; DATA XREF: security_ISW_authentication�r
ROM:400162D8     off_400162D8    DCD unk_4020FFB4                            ; DATA XREF: security_ISW_authentication+10�r
ROM:400162DC