Secure Services

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Contents

Summary

Secure Service ID (SSID) Secure Service Name Hardware/Software Secure Service Description
0x01 unknown Hardware Authenticate and import keys
0x02 unknown Hardware Check if R&D certificate present and authenticate it
0x03 unknown Hardware Load and authenticate PPA
0x04 unknown Hardware Check RSA digest
0xf API_HAL_PA_LOAD Hardware Load Protected Application at Secure RAM
0x11 API_HAL_PA_UNLOAD_ALL Hardware Unload all loaded Protected Applications (except of PPA?) from Secure RAM
0x13 API_HAL_SDP_RUNTIME_INIT Hardware unknown
0x15 API_HAL_SEC_RPC_INIT Hardware unknown
0x19 API_HAL_CONTEXT_SAVE_RESTORE Hardware unknown
0x1a API_HAL_SEC_RAM_RESIZE Hardware Resize Secure RAM
0x1e unknown Hardware unknown (from bootrom)
0x1f unknown Hardware unknown (from bootrom)
0x22 API_HAL_KM_CRC_READ Hardware unknown
0x27 API_HAL_NB_MAX_SVC Hardware unknown
0x28 unknown Software dcache invalidate (defined in PPA from mbmloader)
0x29 unknown Software L2 aux write (defined in PPA from mbmloader)
0x2a unknown Software aux write (defined in PPA from mbmloader)
0x2b unknown Software nonsecure access write (defined in PPA from mbmloader)
0x31 API_HAL_MOT_EFUSE Software Blow eFuse entry (defined in PPA from mbmloader)
0x36 API_HAL_MOT_EFUSE_READ Software Read eFuse entry (defined in PPA from mbmloader)

Security services in BootROM

Using in ROM_CRC_check function (see Application_Processor_Boot_ROM#ROM_CRC_check)

  1. uint32_t security_monitor_parse_flags_and_call(uint32_t ssid, uint32_t proc_id, uint32_t flag, uint32_t params_count, void **params)
  2. {
  3.   return security_monitor_call(ssid, proc_id, flag, params_count, params);
  4. }
  5.  
  6. uint32_t security_monitor_call(uint32_t result, uint32_t proc_id, uint32_t flags, uint32_t param_count, void **params)
  7. {
  8.   __mcr(15, 0, result, 7, 5, 4); // Prefetch flush
  9.   __mcr(15, 0, result, 7, 10, 4); // Data syncronisation barrier
  10.   __asm { SMC 1 ; Secure Monitor Call }
  11.   return result;
  12. }

Security services from PPA from mbmloader

  1. void *PPA_control_smc_handler(uint32_t arg)
  2. {
  3.   void *result = NULL;
  4.  
  5.   *(0xAF900088) = 0x8000;
  6.   switch ( arg )
  7.   {
  8.     case 40:
  9.       result = PPA_control_dcache_invalidate;
  10.       break;
  11.     case 41:
  12.       result = PPA_control_L2_aux_write;
  13.       break;
  14.     case 42:
  15.       result = PPA_control_aux_write;
  16.       break;
  17.     case 43:
  18.       result = PPA_control_nonsecure_access_write;
  19.       break;
  20.     case 49:
  21.       result = PPA_API_HAL_MOT_EFUSE;
  22.       break;
  23.     case 54:
  24.       result = PPA_API_HAL_MOT_EFUSE_READ;
  25.       break;
  26.     case 44:
  27.       result = PPA_control_data_memory_sync;
  28.       break;
  29.     case 50:
  30.       result = PPA_wait_for_something;
  31.       break;
  32.     case 72:
  33.       result = PPA_sub_86FFFD06;
  34.       break;
  35.   }
  36.   return result;
  37. }

security_check_ISW

  1. ROM:400161E8     ; int __cdecl security_check_CertISW(void *arg1, int arg2, void *arg3, int arg4)
  2. ROM:400161E8     security_check_CertISW                                      ; CODE XREF: boot_HS_image_exec+C4
  3. ROM:400161E8                                                                 ; boot_memory_image_auth_exec+C4
  4. ROM:400161E8
  5. ROM:400161E8     arg_0           =  0
  6. ROM:400161E8
  7. ROM:400161E8 000                 PUSH.W          {R4-R10,LR}                 ; count
  8. ROM:400161EC 020                 MOV             R10, R1                     ; Rd = Op2
  9. ROM:400161EE 020                 LDR             R5, =unk_4020FFB4           ; Load from Memory
  10. ROM:400161F0 020                 MOV             R9, R0                      ; Rd = Op2
  11. ROM:400161F2 020                 LDR             R7, [SP,#0x20+arg_0]        ; Load from Memory
  12. ROM:400161F4 020                 MOVS            R0, #0                      ; Rd = Op2
  13. ROM:400161F6 020                 MOV             R8, R2                      ; Rd = Op2
  14. ROM:400161F8 020                 MOV             R6, R3                      ; Rd = Op2
  15. ROM:400161FA 020                 LDR             R1, [R5]                    ; Load from Memory
  16. ROM:400161FC 020                 ORR.W           R1, R1, #tracing2_Reserved2 ; Rd = Op1 | Op2
  17. ROM:40016200 020                 STR             R1, [R5]                    ; Store to Memory
  18. ROM:40016202 020                 MOVS            R4, #1                      ; Rd = Op2
  19. ROM:40016204 020                 LDR             R2, =0x809795A3             ; Load from Memory
  20. ROM:40016206 020                 LDR             R1, [R3]                    ; Load from Memory
  21. ROM:40016208 020                 CMP             R1, R2                      ; Set cond. codes on Op1 - Op2
  22. ROM:4001620A 020                 BEQ             search_CertISW_mark         ; Branch
  23. ROM:4001620A
  24. ROM:4001620C 020                 MOVS            R4, #0                      ; Rd = Op2
  25. ROM:4001620C
  26. ROM:4001620E
  27. ROM:4001620E     search_CertISW_mark                                         ; CODE XREF: security_check_CertISW+22
  28. ROM:4001620E 020                 CBNZ            R4, found                   ; Compare and Branch on Non-Zero
  29. ROM:4001620E
  30. ROM:40016210 020                 MOVS            R2, #CH_STRINGS.CHMMCSD     ; source
  31. ROM:40016212 020                 MOV             R1, R6                      ; void *
  32. ROM:40016214 020                 ADR             R0, CertISW_mark            ; "CertISW"
  33. ROM:40016216 020                 BL              standard_memcmp             ; Branch with Link
  34. ROM:40016216
  35. ROM:4001621A 020                 CBNZ            R0, not_found               ; Compare and Branch on Non-Zero
  36. ROM:4001621A
  37. ROM:4001621C 020                 MOVS            R0, #1                      ; Rd = Op2
  38. ROM:4001621E 020                 B               found                       ; Branch
  39. ROM:4001621E
  40. ROM:40016220     ; ---------------------------------------------------------------------------
  41. ROM:40016220
  42. ROM:40016220     not_found                                                   ; CODE XREF: security_check_CertISW+32
  43. ROM:40016220 020                 MOVS            R0, #0                      ; Rd = Op2
  44. ROM:40016220
  45. ROM:40016222
  46. ROM:40016222     found                                                       ; CODE XREF: security_check_CertISW:search_CertISW_mark
  47. ROM:40016222                                                                 ; security_check_CertISW+36
  48. ROM:40016222 020                 ORRS            R0, R4                      ; Rd = Op1 | Op2
  49. ROM:40016224 020                 BEQ             return_1                    ; Branch
  50. ROM:40016224
  51. ROM:40016226 020                 LDRH            R0, [R7]                    ; Load from Memory
  52. ROM:40016228 020                 LSLS            R0, R0, #28                 ; Logical Shift Left
  53. ROM:4001622A 020                 BMI             Load_keys_and_search_for_RnD_certificate ; Branch
  54. ROM:4001622A
  55. ROM:4001622C 020                 LDR             R0, [R5]                    ; Load from Memory
  56. ROM:4001622E 020                 CBZ             R4, loc_4001623C            ; Compare and Branch on Zero
  57. ROM:4001622E
  58. ROM:40016230 020                 ORR.W           R0, R0, #0b1000000000       ; Rd = Op1 | Op2
  59. ROM:40016234 020                 STR             R0, [R5]                    ; Store to Memory
  60. ROM:40016236 020                 ADD.W           R0, R6, #0x38               ; Rd = Op1 + Op2
  61. ROM:4001623A 020                 B               enable_speedup              ; Branch
  62. ROM:4001623A
  63. ROM:4001623C     ; ---------------------------------------------------------------------------
  64. ROM:4001623C
  65. ROM:4001623C     loc_4001623C                                                ; CODE XREF: security_check_CertISW+46
  66. ROM:4001623C 020                 ORR.W           R0, R0, #0b10000000000      ; Rd = Op1 | Op2
  67. ROM:40016240 020                 STR             R0, [R5]                    ; Store to Memory
  68. ROM:40016242 020                 ADD.W           R0, R6, #0xA4               ; arg
  69. ROM:40016242
  70. ROM:40016246
  71. ROM:40016246     enable_speedup                                              ; CODE XREF: security_check_CertISW+52
  72. ROM:40016246 020                 BL              load_speedup_table          ; Branch with Link
  73. ROM:40016246
  74. ROM:4001624A
  75. ROM:4001624A     Load_keys_and_search_for_RnD_certificate                    ; CODE XREF: security_check_CertISW+42
  76. ROM:4001624A 020                 MOV             R0, R9                      ; Rd = Op2
  77. ROM:4001624C 020                 BL              security_call_SSID_0x01     ; SECURITY SERVICE: Load Keys (CertPK) to Secure RAM
  78. ROM:4001624C
  79. ROM:40016250 020                 CMP.W           R8, #0                      ; Set cond. codes on Op1 - Op2
  80. ROM:40016254 020                 BEQ             Keys_loaded_without_RnD     ; Branch
  81. ROM:40016254
  82. ROM:40016256 020                 LDR             R0, =memory_buffer          ; Load from Memory
  83. ROM:40016258 020                 LDR             R1, [R0]                    ; Load from Memory
  84. ROM:4001625A 020                 ORR.W           R1, R1, #tracing_R&D_certificate_found ; Rd = Op1 | Op2
  85. ROM:4001625E 020                 STR             R1, [R0]                    ; Store to Memory
  86. ROM:40016260 020                 MOV             R0, R8                      ; arg_1
  87. ROM:40016262 020                 BL              security_call_SSID_0x02     ; verify R&D certificate
  88. ROM:40016262
  89. ROM:40016266
  90. ROM:40016266     Keys_loaded_without_RnD                                     ; CODE XREF: security_check_CertISW+6C
  91. ROM:40016266 020                 LDR             R0, [R5]                    ; Load from Memory
  92. ROM:40016268 020                 ORR.W           R0, R0, #0x800              ; Rd = Op1 | Op2
  93. ROM:4001626C 020                 STR             R0, [R5]                    ; Store to Memory
  94. ROM:4001626E 020                 MOV             R0, R10                     ; arg_1
  95. ROM:40016270 020                 BL              security_call_SSID_0x03     ; load and authenticate PPA
  96. ROM:40016270
  97. ROM:40016274 020                 CBNZ            R0, return_error            ; Compare and Branch on Non-Zero
  98. ROM:40016274
  99. ROM:40016276 020                 LDRH            R0, [R7]                    ; Load from Memory
  100. ROM:40016278 020                 ORR.W           R0, R0, #0x800              ; Rd = Op1 | Op2
  101. ROM:4001627C 020                 STRH            R0, [R7]                    ; Store to Memory
  102. ROM:4001627E 020                 MOVS            R0, #0                      ; Rd = Op2
  103. ROM:4001627E
  104. ROM:40016280
  105. ROM:40016280     return                                                      ; CODE XREF: security_check_CertISW+B4
  106. ROM:40016280 020                 POP.W           {R4-R10,PC}                 ; Pop registers
  107. ROM:40016280
  108. ROM:40016284     ; ---------------------------------------------------------------------------
  109. ROM:40016284
  110. ROM:40016284     return_error                                                ; CODE XREF: security_check_CertISW+8C
  111. ROM:40016284 020                 LDR             R0, [R5]                    ; Load from Memory
  112. ROM:40016286 020                 ORR.W           R0, R0, #0b1000000000000    ; set bit #12
  113. ROM:4001628A 020                 STR             R0, [R5]                    ; Store to Memory
  114. ROM:4001628C 020                 LDR             R0, =sub_140A8              ; Load from Memory
  115. ROM:4001628E 020                 BLX             call_dead_loops             ; Branch with Link and Exchange (immediate address)
  116. ROM:4001628E
  117. ROM:40016292
  118. ROM:40016292     return_1                                                    ; CODE XREF: security_check_CertISW+3C
  119. ROM:40016292 020                 LDR             R0, [R5]                    ; Load from Memory
  120. ROM:40016294 020                 ORR.W           R0, R0, #0b10000000000000   ; set bit #13
  121. ROM:40016298 020                 STR             R0, [R5]                    ; Store to Memory
  122. ROM:4001629A 020                 MOVS            R0, #1                      ; Rd = Op2
  123. ROM:4001629C 020                 B               return                      ; Branch
  124. ROM:4001629C
  125. ROM:4001629C     ; End of function security_check_CertISW
  126. ROM:4001629C
  127. ROM:4001629C     ; ---------------------------------------------------------------------------
  128. ROM:4001629E                     DCW 0
  129. ROM:400162A0     off_400162A0    DCD unk_4020FFB4                            ; DATA XREF: security_check_CertISW+6
  130. ROM:400162A4     dword_400162A4  DCD 0x809795A3                              ; DATA XREF: security_check_CertISW+1C
  131. ROM:400162A8     CertISW_mark    DCB "CertISW",0                             ; DATA XREF: security_check_CertISW+2C
  132. ROM:400162B0     off_400162B0    DCD memory_buffer                           ; DATA XREF: security_check_CertISW+6E
  133. ROM:400162B4     image_cant_exec DCD sub_140A8                               ; DATA XREF: security_check_CertISW+A4

security_ISW_authentication

  1. uint32_t security_ISW_authentication(char *membuf)
  2. {
  3.   uint32_t result;
  4.  
  5.   memory_buffer |= tracing_Initial_SW_authentication_started;
  6.   security_call_SSID_0x04(membuf); // Checking RSA digest of ISW/PPA
  7.   result = 0x4020FFB4;
  8.   *(0x4020FFB4) |= tracing2_No_known_NAND_was_detected;
  9.   return result;
  10. }
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